.. paf_doc documentation master file, created by sphinx-quickstart on Mon May 29 11:08:46 2017. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. .. note:: This is a WIP Beta version. All content is subject to change. ================================ External programs and frameworks ================================ .. _ext_progs_abc: ABC -------------------- `ABC `_ is an open-source synthesis tool developed by Berkeley Logic Synthesis and Verification Group. In CIRCA approximation techniques are implemented using ABC. .. _ext_progs_yosys: Yosys -------------------- `Yosys `_ is developed by Clifford Wolf from TU Vienna. In CIRCA it is used for the synthesis of Verilog files to BLIF netlists.